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Course Catalog 00/01


Computer Science, Electrical Engineering

SMD118 Processor / Software Interface 7.5 ECTS credits

TIMEPERIOD:
Quarter 4

LANGUAGE:English/Swedish

EXAMINER
Per Lindgren Univ lekt


PREREQUISITES
Imperative Programming ( SMD012/SMD109 or SMD091).

COURSE AIM
The course is designed to give the student a basic competence in programming of a modern
conventional processor at the lowest level, in order to be able to take part in both development
of, and further instruction within, computer engineering and complex systems programming,
for example real-time systems, compilers, operation systems.
Subgoals:
- to familiarize the student with those concepts and methods used to describe the
programmer's model for a processor, so that he can evaluate and compare different
architectures from a programmer's standpoint.
- to introduce the student to reasoning about computational structures described as high-
level synchronous hardware models.
- to familiarize the student with the hardware structure of a modern pipelined microprocessor
as well as its programming at the assembler level.
- to give a basic understanding about the demands which the use of modern high-level
languages and operating systems make on the processor's architecture.
- to familiarize the student with the management of real-time events delivered by the
processor's environment.

CONTENTS
Introduction to computer engineering. Concepts architecture and programmer's model.
Characteristics of a good computer architecture. Machine abstraction levels.

The instruction set. Data representations. Machine language and instruction formats.
Address spaces, addressing. Opeations on data. Computer arithmetic. Instructions
for program flow control. Sequential programming of a modern pipelined microprocessor.

Interface to the compiler. Structures for high-level programming. Data types. The stack,
activation records, procedure calls and parameter passing. Interface to the operating system.
Memory management. The process concept. Process protection and privileges. Context
switching. Management of vectored interrupts and exceptions. Input/output, drivers.

The modern processor's demands on the compiler. Model of a typical modern processor's
internal construction. Pipelining. Interlocks, stalls, data forwarding. Instruction dependencies,
hazards. Multiple issue. Delayed branch, branch prediction. Instruction scheduling and its
effect on processor performance.

TEACHING


EXAMINATION

COURSE GRADE SCALE:

ITEMS/CREDITS

Laboratory work 3.00ECTS
Written exam 4.50ECTS

COURSE LITERATURE
D.Pattersson, J.Hennessy: Computer Organization and Design, The Hardware/Software
Interface (Morgan-Kaufmann 1997), and LSI Logic: LR33000 Self-Embedding Processor
User´s Munaul (Lsi Logic Corp. 1993) or equivalent.

Further information: International Office
Valid for the academic year 00/01.

Web Editor: Karin.Lindholm@dc.luth.se

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LULEÅ UNIVERSITY OF TECHNOLOGY
University Campus, Porsön, 971 87 Luleå. Tel. +46 (0) 920-91 000, fax +46 (0) 920-91 399
Last edited 2000-12-18